/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/** *****************************************************************************************************
 *  \file     Port_Cfg.h                                                                                *
 *  \brief    Semidrive. AUTOSAR 4.3.1 MCAL Port Driver.                                                *
 *                                                                                                      *
 * <table>                                                                                              *
 * <tr><th>Date                 <th>Version                                                             *
 * <tr><td>2025-03-25 19:03:22      <td>1.0.0 R                                            *
 * </table>                                                                                             *
 *******************************************************************************************************/

#ifndef PORT_CFG_H
#define PORT_CFG_H
#ifdef __cplusplus
extern "C" {
#endif
/********************************************************************************************************
 *                                      Include header files                                            *
 *******************************************************************************************************/
#include "port_pinmap.h"
#include "Port_Types.h"
/********************************************************************************************************
 *                                 Global Macro definition                                              *
 *******************************************************************************************************/
/**
 *  \addtogroup MCAL_PORT_MACRO PORT Macro
 *  @{
 *
 */

 /**
 *  \name Port Module generation version.
 *
 *  @{
 */
/** \brief  Generate Autosar Specific Version Information. */
#define PORT_AR_RELEASE_MAJOR_VERSION                                    (4U)
#define PORT_AR_RELEASE_MINOR_VERSION                                    (3U)
#define PORT_AR_RELEASE_REVISION_VERSION                                 (1U)

/** \brief  Generate Vendor Specific Version Information. */
#define PORT_SW_MAJOR_VERSION                                            (3U)
#define PORT_SW_MINOR_VERSION                                            (1U)
#define PORT_SW_PATCH_VERSION                                            (0U)

/** @} */

/**
 *  \name Pre-compile switches for enabling/disabling PORT MCAL APIs.
 *
 *  @{
 */
/** \brief  Derived Configuration for PortDevErrorDetect */
#define PORT_DEV_ERROR_DETECT       (STD_OFF)
/** \brief  Derived Configuration for PortSafetyEnable */
#define PORT_SAFETY_ENABLE          (STD_OFF)
/** \brief  Derived Configuration for Port_GetVersionInfo API */
#define PORT_VERSION_INFO_API       (STD_ON)
/** \brief  Derived Configuration for Port_SetPinMode API */
#define PORT_SET_PIN_MODE_API       (STD_ON)
/** \brief  Derived Configuration for Port_SetPinDirection API */
#define PORT_SET_PIN_DIRECTION_API  (STD_ON)
/** \brief  Derived Configuration for pin interrupt dectect */
#define PORT_EN_PIN_INT_API         (STD_ON)
/** @} */
/**
 *  \name Port Module generation configuration info.
 *
 *  @{
 */
/** \brief  define the configed pin num */
#define NUM_OF_CONFIGURED_PINS  144U


/** \brief  define the configed analog pin num */
#define NUM_OF_ANALOG_PINS  4U

/** \brief analog pin enable */
#define PORT_ANALOG_PIN_ENABLE  (STD_ON)



/** \brief XTRGOI pin enable */
#define PORT_XTRGOI_PIN_ENABLE
#define NUM_OF_XTRG1_OUTPUT_PINS 4U
#define NUM_OF_XTRG2_OUTPUT_PINS 4U

/** \brief XTRG1_OI0-31 pin value */
#define XTRG1_OI_PINS_31_0 0x0U

/** \brief XTRG1_OI32-63 pin value */
#define XTRG1_OI_PINS_63_32 0x14a00U

/** \brief XTRG1_OI0-31 pin value */
#define XTRG2_OI_PINS_31_0 0x3c00U

/** \brief XTRG1_OI32-63 pin value */
#define XTRG2_OI_PINS_63_32 0x0U

/** \brief Symbolic name for port pin:GPIO_LA31 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_LED1  GPIO_LA31
/** \brief Symbolic name for port pin:GPIO_LA9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_PortPin_0  GPIO_LA9
/** \brief Symbolic name for port pin:GPIO_LD13 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI2_SCLK_CAN1  GPIO_LD13
/** \brief Symbolic name for port pin:GPIO_LD14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI2_MISO_CAN1  GPIO_LD14
/** \brief Symbolic name for port pin:GPIO_LD15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI2_MOSI_CAN1  GPIO_LD15
/** \brief Symbolic name for port pin:GPIO_LD16 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI2_SS5_CAN1  GPIO_LD16
/** \brief Symbolic name for port pin:GPIO_LD20 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD1_RX  GPIO_LD20
/** \brief Symbolic name for port pin:GPIO_LD21 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD1_TX  GPIO_LD21
/** \brief Symbolic name for port pin:GPIO_LD22 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD2_RX  GPIO_LD22
/** \brief Symbolic name for port pin:GPIO_LD23 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD2_TX  GPIO_LD23
/** \brief Symbolic name for port pin:GPIO_LD0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI1_SCLK  GPIO_LD0
/** \brief Symbolic name for port pin:GPIO_LD1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI1_MISO  GPIO_LD1
/** \brief Symbolic name for port pin:GPIO_LD2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI1_MOSI  GPIO_LD2
/** \brief Symbolic name for port pin:GPIO_LD3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI1_SS0  GPIO_LD3
/** \brief Symbolic name for port pin:GPIO_K2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD3_RX  GPIO_K2
/** \brief Symbolic name for port pin:GPIO_K3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD3_TX  GPIO_K3
/** \brief Symbolic name for port pin:GPIO_K4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD4_RX  GPIO_K4
/** \brief Symbolic name for port pin:GPIO_K5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD4_TX  GPIO_K5
/** \brief Symbolic name for port pin:GPIO_K10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD5_RX  GPIO_K10
/** \brief Symbolic name for port pin:GPIO_K11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD5_TX  GPIO_K11
/** \brief Symbolic name for port pin:GPIO_K12 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD6_RX  GPIO_K12
/** \brief Symbolic name for port pin:GPIO_K13 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD6_TX  GPIO_K13
/** \brief Symbolic name for port pin:GPIO_K14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD7_RX  GPIO_K14
/** \brief Symbolic name for port pin:GPIO_K15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD7_TX  GPIO_K15
/** \brief Symbolic name for port pin:GPIO_K16 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD8_RX  GPIO_K16
/** \brief Symbolic name for port pin:GPIO_K17 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD8_TX  GPIO_K17
/** \brief Symbolic name for port pin:GPIO_A2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI6_SCLK  GPIO_A2
/** \brief Symbolic name for port pin:GPIO_A3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI6_MISO  GPIO_A3
/** \brief Symbolic name for port pin:GPIO_A4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI6_MOSI  GPIO_A4
/** \brief Symbolic name for port pin:GPIO_A5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SPI6_SS0  GPIO_A5
/** \brief Symbolic name for port pin:GPIO_A8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ADC_GPIO_A8  GPIO_A8
/** \brief Symbolic name for port pin:GPIO_A9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ADC_GPIO_A9  GPIO_A9
/** \brief Symbolic name for port pin:GPIO_A11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT_GPIO  GPIO_A11
/** \brief Symbolic name for port pin:GPIO_B0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT0_RX  GPIO_B0
/** \brief Symbolic name for port pin:GPIO_B1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT1_RX  GPIO_B1
/** \brief Symbolic name for port pin:GPIO_B2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT2_RX  GPIO_B2
/** \brief Symbolic name for port pin:GPIO_B3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT3_RX  GPIO_B3
/** \brief Symbolic name for port pin:GPIO_B4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT4_RX  GPIO_B4
/** \brief Symbolic name for port pin:GPIO_B5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT5_RX  GPIO_B5
/** \brief Symbolic name for port pin:GPIO_B14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT_TX0  GPIO_B14
/** \brief Symbolic name for port pin:GPIO_B15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SENT_TX1  GPIO_B15
/** \brief Symbolic name for port pin:GPIO_B8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_I2C4_SCL  GPIO_B8
/** \brief Symbolic name for port pin:GPIO_B9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_I2C4_SDA  GPIO_B9
/** \brief Symbolic name for port pin:GPIO_B10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ADC_GPIO_B10  GPIO_B10
/** \brief Symbolic name for port pin:GPIO_B11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ADC_GPIO_B11  GPIO_B11
/** \brief Symbolic name for port pin:GPIO_E4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart15_TX  GPIO_E4
/** \brief Symbolic name for port pin:GPIO_E5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart15_RX  GPIO_E5
/** \brief Symbolic name for port pin:GPIO_E8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD9_RX  GPIO_E8
/** \brief Symbolic name for port pin:GPIO_E9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD9_TX  GPIO_E9
/** \brief Symbolic name for port pin:GPIO_E10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD10_RX  GPIO_E10
/** \brief Symbolic name for port pin:GPIO_E11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD10_TX  GPIO_E11
/** \brief Symbolic name for port pin:GPIO_E12 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD11_RX  GPIO_E12
/** \brief Symbolic name for port pin:GPIO_E13 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD11_TX  GPIO_E13
/** \brief Symbolic name for port pin:GPIO_E14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD12_RX  GPIO_E14
/** \brief Symbolic name for port pin:GPIO_E15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD12_TX  GPIO_E15
/** \brief Symbolic name for port pin:GPIO_E0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_IO58  GPIO_E0
/** \brief Symbolic name for port pin:GPIO_E1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_IO59  GPIO_E1
/** \brief Symbolic name for port pin:GPIO_E2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_IO60  GPIO_E2
/** \brief Symbolic name for port pin:GPIO_E3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_IO61  GPIO_E3
/** \brief Symbolic name for port pin:GPIO_E16 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_OI10  GPIO_E16
/** \brief Symbolic name for port pin:GPIO_E17 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_OI11  GPIO_E17
/** \brief Symbolic name for port pin:GPIO_E18 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_OI12  GPIO_E18
/** \brief Symbolic name for port pin:GPIO_E19 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG2_OI13  GPIO_E19
/** \brief Symbolic name for port pin:GPIO_X15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_LED2  GPIO_X15
/** \brief Symbolic name for port pin:GPIO_X0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DQS  GPIO_X0
/** \brief Symbolic name for port pin:GPIO_X1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_SCLK  GPIO_X1
/** \brief Symbolic name for port pin:GPIO_X2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_SS0  GPIO_X2
/** \brief Symbolic name for port pin:GPIO_X3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA0  GPIO_X3
/** \brief Symbolic name for port pin:GPIO_X4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA1  GPIO_X4
/** \brief Symbolic name for port pin:GPIO_X5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA2  GPIO_X5
/** \brief Symbolic name for port pin:GPIO_X6 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA3  GPIO_X6
/** \brief Symbolic name for port pin:GPIO_X7 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA4  GPIO_X7
/** \brief Symbolic name for port pin:GPIO_X8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA5  GPIO_X8
/** \brief Symbolic name for port pin:GPIO_X9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA6  GPIO_X9
/** \brief Symbolic name for port pin:GPIO_X10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_DATA7  GPIO_X10
/** \brief Symbolic name for port pin:GPIO_X12 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_XSPI1_PA_RESET_N  GPIO_X12
/** \brief Symbolic name for port pin:GPIO_Y0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART5_TXD  GPIO_Y0
/** \brief Symbolic name for port pin:GPIO_Y1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART5_RXD  GPIO_Y1
/** \brief Symbolic name for port pin:GPIO_Y2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART5_CTSN  GPIO_Y2
/** \brief Symbolic name for port pin:GPIO_Y3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART5_RTSN  GPIO_Y3
/** \brief Symbolic name for port pin:GPIO_Y8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART6_CTSN  GPIO_Y8
/** \brief Symbolic name for port pin:GPIO_Y9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART6_RTSN  GPIO_Y9
/** \brief Symbolic name for port pin:GPIO_Y10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART6_TXD  GPIO_Y10
/** \brief Symbolic name for port pin:GPIO_Y11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_UART6_RXD  GPIO_Y11
/** \brief Symbolic name for port pin:GPIO_S14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart19_TX  GPIO_S14
/** \brief Symbolic name for port pin:GPIO_S15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart19_RX  GPIO_S15
/** \brief Symbolic name for port pin:GPIO_S17 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI41  GPIO_S17
/** \brief Symbolic name for port pin:GPIO_S18 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI42  GPIO_S18
/** \brief Symbolic name for port pin:GPIO_S19 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI43  GPIO_S19
/** \brief Symbolic name for port pin:GPIO_S20 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI44  GPIO_S20
/** \brief Symbolic name for port pin:GPIO_S22 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI46  GPIO_S22
/** \brief Symbolic name for port pin:GPIO_S23 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI47  GPIO_S23
/** \brief Symbolic name for port pin:GPIO_S24 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI48  GPIO_S24
/** \brief Symbolic name for port pin:GPIO_S25 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_xTRG1_OI49  GPIO_S25
/** \brief Symbolic name for port pin:GPIO_S0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S0  GPIO_S0
/** \brief Symbolic name for port pin:GPIO_S1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S1  GPIO_S1
/** \brief Symbolic name for port pin:GPIO_S2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S2  GPIO_S2
/** \brief Symbolic name for port pin:GPIO_S4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S4  GPIO_S4
/** \brief Symbolic name for port pin:GPIO_S6 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S6  GPIO_S6
/** \brief Symbolic name for port pin:GPIO_S8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_GPIO_S8  GPIO_S8
/** \brief Symbolic name for port pin:GPIO_G0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXC  GPIO_G0
/** \brief Symbolic name for port pin:GPIO_G1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXD0  GPIO_G1
/** \brief Symbolic name for port pin:GPIO_G2 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXD1  GPIO_G2
/** \brief Symbolic name for port pin:GPIO_G3 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXD2  GPIO_G3
/** \brief Symbolic name for port pin:GPIO_G4 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXD3  GPIO_G4
/** \brief Symbolic name for port pin:GPIO_G5 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_TXEN  GPIO_G5
/** \brief Symbolic name for port pin:GPIO_G6 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXC  GPIO_G6
/** \brief Symbolic name for port pin:GPIO_G7 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXD0  GPIO_G7
/** \brief Symbolic name for port pin:GPIO_G8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXD1  GPIO_G8
/** \brief Symbolic name for port pin:GPIO_G9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXD2  GPIO_G9
/** \brief Symbolic name for port pin:GPIO_G10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXD3  GPIO_G10
/** \brief Symbolic name for port pin:GPIO_G11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_RXDV  GPIO_G11
/** \brief Symbolic name for port pin:GPIO_G12 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_MDIO  GPIO_G12
/** \brief Symbolic name for port pin:GPIO_G13 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_MDC  GPIO_G13
/** \brief Symbolic name for port pin:GPIO_G14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_PHY_RST  GPIO_G14
/** \brief Symbolic name for port pin:GPIO_G15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH1_PHY_INT  GPIO_G15
/** \brief Symbolic name for port pin:GPIO_G16 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXC  GPIO_G16
/** \brief Symbolic name for port pin:GPIO_G17 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXD0  GPIO_G17
/** \brief Symbolic name for port pin:GPIO_G18 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXD1  GPIO_G18
/** \brief Symbolic name for port pin:GPIO_G19 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXD2  GPIO_G19
/** \brief Symbolic name for port pin:GPIO_G20 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXD3  GPIO_G20
/** \brief Symbolic name for port pin:GPIO_G21 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_TXEN  GPIO_G21
/** \brief Symbolic name for port pin:GPIO_G22 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXC  GPIO_G22
/** \brief Symbolic name for port pin:GPIO_G23 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXD0  GPIO_G23
/** \brief Symbolic name for port pin:GPIO_G24 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXD1  GPIO_G24
/** \brief Symbolic name for port pin:GPIO_G25 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXD2  GPIO_G25
/** \brief Symbolic name for port pin:GPIO_G26 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXD3  GPIO_G26
/** \brief Symbolic name for port pin:GPIO_G27 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_RXDV  GPIO_G27
/** \brief Symbolic name for port pin:GPIO_G28 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_MDIO  GPIO_G28
/** \brief Symbolic name for port pin:GPIO_G29 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_MDC  GPIO_G29
/** \brief Symbolic name for port pin:GPIO_G30 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_PHY_RST  GPIO_G30
/** \brief Symbolic name for port pin:GPIO_G31 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_ETH2_PHY_INT  GPIO_G31
/** \brief Symbolic name for port pin:GPIO_M6 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart18_TX  GPIO_M6
/** \brief Symbolic name for port pin:GPIO_M7 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_Uart18_RX  GPIO_M7
/** \brief Symbolic name for port pin:GPIO_M8 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD13_RX  GPIO_M8
/** \brief Symbolic name for port pin:GPIO_M9 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD13_TX  GPIO_M9
/** \brief Symbolic name for port pin:GPIO_M10 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD14_RX  GPIO_M10
/** \brief Symbolic name for port pin:GPIO_M11 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD14_TX  GPIO_M11
/** \brief Symbolic name for port pin:GPIO_M12 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD15_RX  GPIO_M12
/** \brief Symbolic name for port pin:GPIO_M13 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD15_TX  GPIO_M13
/** \brief Symbolic name for port pin:GPIO_M14 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD16_RX  GPIO_M14
/** \brief Symbolic name for port pin:GPIO_M15 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_CANFD16_TX  GPIO_M15
/** \brief Symbolic name for port pin:SEM_FAULT0 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SEM_FAULT0  SEM_FAULT0
/** \brief Symbolic name for port pin:SEM_FAULT1 */
/** Traceability       : SWSR_PORT_011 SWSR_PORT_012 SWSR_PORT_013 */
#define PortConf_PortPin_SEM_FAULT1  SEM_FAULT1
/** @} */
/** @} */

/********************************************************************************************************
 *                                  Global Variable Declarations                                        *
 *******************************************************************************************************/
/** \brief global config for all io */
extern const Port_SettingsConfigType Port_PinInitConfig[NUM_OF_CONFIGURED_PINS];

/** \brief global config for analog io */
extern const Port_AnalogConfigType Port_PinAnalogConfig[NUM_OF_ANALOG_PINS];

/** \brief  port XTRGOI OUTPUT config settings. */
extern const Port_XtrgOutputConfigType Port_PinXtrg1_OutputConfig[NUM_OF_XTRG1_OUTPUT_PINS];

/** \brief  port XTRGOI OUTPUT config settings. */
extern const Port_XtrgOutputConfigType Port_PinXtrg2_OutputConfig[NUM_OF_XTRG2_OUTPUT_PINS];

/** \brief  The entire configuration of the port pin, is provided to the initialization function */
extern const Port_ConfigType Port_Cfg;


#ifdef __cplusplus
}
#endif
/* End of file */
#endif /* PORT_CFG_H */
